Written in:Any languageVHDLVerilog & VHDLVerilogSystemCBluespecC/C++Other

Stage:Any stagePlanningMatureAlphaBetaStable

License:Any licenseGPLLGPLBSDCERN-OHL-SCERN-OHL-LCERN-OHL2-POthers

Wishbone version:Any versionB.3B.4

ASIC proven

Design done

FPGA proven

Specification done

OpenCores Certified

Arithmetic core 119

Prototype board 42

Communication controller 219

Coprocessor 10

Crypto core 81

DSP core 49

ECC core 24

Library 21

Memory core 51

Project	Files	Statistics	Status	License	Wishbone version
16-bit SDRAM Controller		Stats		GPL
2Q cache		Stats		LGPL
8/16/32 bit SDRAM Controller		Stats		GPL
Asynchronous WISHBONE-compatible SDRAM controller		Stats		GPL
BRSFmnCE		Stats		LGPL
CF Interleaver		Stats
CFI flash controller		Stats		LGPL
content addressable memory		Stats		LGPL
DDR SDRAM Controller Core		Stats
DDR2		Stats		LGPL
DDR2 mem controller for Digilent Genesys Board		Stats		LGPL
DDR2 SDRAM Controller		Stats		LGPL
DDR3 SDRAM controller		Stats		LGPL
DDR3 Synthesizable BFM		Stats		LGPL
DirectMappedCacheController		Stats		LGPL
DPSFmnCE		Stats		LGPL
FAT32 Parser		Stats		LGPL
FIFO library		Stats		Others
Functional simulation models for commercially available RAMs		Stats		LGPL
Generic FIFO		Stats		LGPL
Generic FIFOs		Stats
High Latency Bursting WISHBONE Wrapper for Xilinx MIG		Stats		LGPL
High Performance Dynamic Memory Controller		Stats		GPL
High Speed SDRAM Controller With Adaptive Bank Management and Command Pipeline		Stats
Memory cores		Stats
Memory sizer		Stats
mpmc8 Multiport Memory Controller		Stats		BSD
NAND Controller (ONFI compliant)		Stats		LGPL
OPB PSRAM Controller		Stats		GPL
Open FreeList		Stats		LGPL
openHMC		Stats		LGPL
Parametrized FIFO based on SRL16E		Stats		LGPL
RAM library		Stats		Others
RAM_wb		Stats		LGPL
Scratch DDR SDRAM Controller		Stats		LGPL
Single Port ASRAM		Stats		LGPL
spiFlash		Stats		LGPL
sp_ram to 3p_ram WISHBONE Wrapper		Stats		LGPL
srl_fifo		Stats		LGPL
SSRAM interface		Stats
Stack design		Stats		GPL
synchronous_reset_fifo with testbench		Stats		LGPL
USB NAND Flash Reader		Stats		LGPL
Versatile FIFO		Stats		LGPL
Versatile memory controller		Stats		LGPL
wb_async_mem_bridge		Stats		LGPL
wb_size_bridge		Stats
Wishbone DDR3 SDRAM Controller		Stats		GPL
Wishbone FLASH Interface for Parallel FLASH		Stats		LGPL
Wishbone Interface for SPI FLASH		Stats		LGPL
ZBT SRAM Controller		Stats

Other 120

Processor 227

System on Chip 86

System on Module 2

System controller 21

Testing / Verification 37

Video controller 50

Uncategorized 94