Written in:Any languageVHDLVerilog & VHDLVerilogSystemCBluespecC/C++Other

Stage:Any stagePlanningMatureAlphaBetaStable

License:Any licenseGPLLGPLBSDCERN-OHL-SCERN-OHL-LCERN-OHL2-POthers

Wishbone version:Any versionB.3B.4

ASIC proven

Design done

FPGA proven

Specification done

OpenCores Certified

Arithmetic core 120

Prototype board 43

Communication controller 222

Coprocessor 13

Crypto core 81

DSP core 49

ECC core 25

Library 21

Memory core 52

Other 124

Processor 227

System on Chip 87

Project	Files	Statistics	Status	License	Wishbone version
AHB DMA 32 / 64 bits		Stats		LGPL
ahb system generator		Stats		LGPL
AHB to Wishbone Bridge		Stats
AHB2WISHBONE		Stats		LGPL
aoOCS - Wishbone Amiga OCS SoC		Stats		BSD
Arm core		Stats
Assembler with VHDL User-defined Commands (AVUC)		Stats		LGPL
Async-SDM-NoC		Stats		LGPL
AXI DMA 32 / 64 bits		Stats		LGPL
AXI4 Transactor and Bus Functional Model		Stats		LGPL
CCSDS RX_TX_SoC		Stats		Others
CMOD S6 SoC		Stats		GPL	B.4
CPU Lecture		Stats		GPL
ECO32		Stats		BSD
Embedded 32-bit RISC uProcessor with SDRAM Controller		Stats
Embedded FPGA Core		Stats
EPC RFID Transponder		Stats		LGPL
Experimental Unstable CPU		Stats		LGPL
GECKO3 SoC co-design environment		Stats		Others
GECKO4 SoC co-design environment		Stats		Others
Generic AHB matrix		Stats		LGPL
Generic APB register file		Stats		LGPL
Generic AXI DMA		Stats		LGPL
Generic AXI interconnect fabric		Stats		LGPL
Generic AXI to AHB bridge		Stats		LGPL
Generic AXI to APB bridge		Stats		LGPL
H2 Forth SoC		Stats		Others
I2C Controller Wishbone Wrapper		Stats		LGPL
Integrated round robin arbiter		Stats		LGPL
Internal communication bus for FPGA		Stats		BSD
Keras to FPGA		Stats		LGPL
layer[2]		Stats		GPL
M16C5x		Stats		LGPL
MaSoCist Soc builder/simulator		Stats		Others	B.3
minsoc		Stats		LGPL
MP3 decoder		Stats
Next186 SoC PC		Stats		LGPL
Next186MP3		Stats		LGPL
NoC based MPSoC		Stats		LGPL
NoC(Network-on-Chip) Simulator		Stats		LGPL
NoCem -- Network on Chip emulator		Stats		GPL
NoCmodel		Stats		LGPL
OC - H.264 Encoder SoC		Stats		LGPL
OMS8051 MINI		Stats		LGPL
Open8 uRISC		Stats		BSD
OpenCL Board Support Package (BSP) for the Nallatech / Bittware 385A including dual 40 Gigabit Ethernet interfaces.		Stats		Others
OpenFIRE		Stats
OpenSPARC-based SoC		Stats		GPL
or1200_soc		Stats
Or1k SoC on Altera Embedded Dev Kit		Stats		LGPL
Orga Small System		Stats		Others
ORPSoC		Stats		LGPL
PDP-1 reimplementation		Stats		LGPL
PIF2WB		Stats
PLBv46 to Wishbone Bridge		Stats
Primal Origins		Stats		CERN-OHL-S
Project Oberon with SDRAM		Stats		LGPL
PSS (Programmable Supervisor for Systems-on-Chip)		Stats		BSD
Real-time image processing		Stats		LGPL
rfid tag and reader		Stats		GPL
RiscV rv32im CPU		Stats		GPL
rtf68kSys		Stats		LGPL
SardMIPS		Stats		GPL
SBA - Simple Bus Architecture		Stats		LGPL
SimpCon - a Simple SoC Interconnect		Stats		LGPL
Simple AXI4-Lite bridges for IPbus and Wishbone		Stats		Others
Soft MultiProcessor on FPGA		Stats		GPL
STORM SoC		Stats		GPL
System-On-Chip based on bare Rocket-chip (RISC-V ISA)		Stats		BSD
System-on-Chip Wire (SoCWire)		Stats
system05		Stats		GPL
System09		Stats		GPL
Taar Microprocessor		Stats		GPL
WB/OPB & OPB/WB Interface Wrapper		Stats
WISHBONE Builder		Stats
WISHBONE Conbus IP Core		Stats
WISHBONE Conmax IP Core		Stats
WISHBONE DMA/Bridge IP Core		Stats
wishbone out port from b3 spec		Stats		LGPL
Wishbone System6800/01		Stats
Wishbone to AHB Bridge		Stats
WishboneTK toolkit		Stats
x86 Compatible SOC with Video , keyboard , GPIO , uart		Stats
XuLA2-LX25 SoC		Stats		GPL	B.4
YiFive (A Risc-v based SOC)		Stats		LGPL
Z80 System on Chip		Stats
Zorro bus to Wishbone bridge		Stats		LGPL

System on Module 2

System controller 21

Testing / Verification 38

Video controller 50

Uncategorized 95